Comparing the Energy Efficiency of CMP and SMT Architectures for Multimedia Workloads

Chip multiprocessing (CMP) and simultaneous multithreading (SMT) are two recently adopted techniques for improving the throughput of general-purpose processors by using multithreading. These techniques are likely to benefit the increasingly important real-time multimedia workloads, which are inherently multithreaded. These workloads, however, often run in an energy constrained environment. This paper compares the energy efficiency of CMP and SMT for multimedia applications. Assuming out-of-order processors as the core components, we investigate the design space by varying the core processor complexity and using a range of frequencies. To measure energy efficiency, we compare the energy consumed by systems that provide the same performance in the entire design space. We find that across the performance spectrum, a CMP configuration is the most energy efficient for our systems and applications. Further, CMP processors are amenable to further energy reductions through the use of recently proposed adaptive techniques. Finally, since SMT can provide benefits for single-thread performance, we propose a hybrid CMP/SMT architecture consisting of a CMP with SMT processor cores. This architecture shows significantly better energy-efficiency than pure SMT, and is a good compromise solution that achieves both the high single-thread performance of SMT and the energy efficiency of multithreaded CMP. This work is supported in part by the National Science Foundation under Grant No. CCR-0096126, EIA-0103645, CCR-0209198, and CCR-0205638, a gift from Motorola Inc., and the University of Illinois. Sarita V. Adve is also supported by an Alfred P. Sloan Research Fellowship. Part of the work was done as a summer internship project at Intel MRL.